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vishay siliconix SIP32413, sip32414 document number: 71437 s11-0366-rev. a, 07-mar-11 www.vishay.com 1 dual 2 a, 1.2 v, slew rate controlled load switch features ? 1.1 v to 5.5 v operation voltage range ? 62 m typical from 2 v to 5 v ? low r on down to 1.2 v ? slew rate controlled turn-on: 150 s at 3.6 v ? fast shutdown load discharge for sip32414 ? low quiescent current < 1 a when disabled 6.7 a at v in = 1.2 v ? switch off reversed blocking ? compliant to rohs directive 2002/95/ec ? halogen-free according to iec 61249-2-21 definition applications ? cellular phones ? portable media players ? digital camera ?gps ? computers ? portable instruments and healthcare devices description SIP32413 and sip32414 are slew rate controlled load switches that is designed fo r 1.1 v to 5.5 v operation. the devices guarantee low switch on-resistance at 1.2 v input. they feature a controlled soft-on slew rate of typical 150 s that limits the inrush cu rrent for designs of capacitive load or noise sensitive loads. the devices feature a low voltage control logic interface (on/ off interface) that can interface with low voltage digital control without extra level shifting circuit. the sip32414 also integrates output discharge switches that enable fast shutdown load discharge. when the switches are off, they provide the reverse blocking to prevent high current flowing into the power source. both the SIP32413 and sip32414 are available in tdfn8 2 mm x 2mm package. each switch in each device can support over 2 a of continuous current. typical application circuit figure 1 - SIP32413, sip32414 typical application circuit SIP32413, sip32414 (for one switch) i n v out out v i n g n d g n d g n d c n trl c n trl c 4.7 f i n c 0.1 f out
www.vishay.com 2 document number: 71437 s11-0366-rev. a, 07-mar-11 vishay siliconix SIP32413, sip32414 note: x = lot code notes: a. device mounted with all leads and power pad so ldered or welded to pc board, see pcb layout. b. derate 11.9 mw/c above t a = 70 c, see pcb layout. stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating/conditions for extended periods may affect device reliability. ordering information temperature range package marking part number - 40 c to 85 c tdfn8 2 mm x 2 mm aa SIP32413dnp-t1-ge4 ab sip32414dnp-t1-ge4 absolute maximum ratings parameter limit unit supply input voltage (v in ) - 0.3 to 6 v enable input voltage (v en ) - 0.3 to 6 output voltage (v out ) - 0.3 to v in + 0.3 maximum continuous switch current (i max )2.4 a maximum pulsed current (i dm ) v in (pulsed at 1 ms, 10 % duty cycle) 3 esd rating (hbm) 4000 v junction temperature (t j ) - 40 to 125 c thermal resistance ( ja ) a 84 c/w power dissipation (p d ) a, b 655 mw recommended operating range parameter limit unit input voltage range (v in ) 1.1 to 5.5 v operating temperature range - 40 to 85 c
document number: 71437 s11-0366-rev. a, 07-mar-11 www.vishay.com 3 vishay siliconix SIP32413, sip32414 notes: a. the algebraic convention whereby the most negative value is a minimu m and the most positive a maximum. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. for v in outside this range consult ty pical en threshold curve. d. not tested, guarantee by design. specifications parameter symbol test conditions unless specified v in = 5.0 v, t a = - 40 c to 85 c (typical values are at t a = 25 c) limits - 40 c to 85 c unit min. a typ. b max. a operating voltage c v in 1.1 - 5.5 v quiescent current i q v in = 1.2 v, cntrl = active - 6.7 14 a v in = 1.8 v, cntrl = active - 14 24 v in = 2.5 v, cntrl = active - 25 40 v in = 3.6 v, cntrl = active - 40 60 v in = 4.3 v, cntrl = active - 52 75 v in = 5.0 v, cntrl = active - 71 99 off supply current i q(off) cntrl = inactive, out = open - - 1 off switch current i ds(off) cntrl = inactive, out = 0 - - 1 reverse blocking current i rb v out = 5.5 v, v in = 1.2 v,v en = inactive --10 on-resistance r ds(on) v in = 1.2 v, i l = 100 ma, t a = 25 c - 66 76 m v in = 1.8 v, i l = 100 ma, t a = 25 c - 62 72 v in = 2.5 v, i l = 100 ma, t a = 25 c - 62 72 v in = 3.6 v, i l = 100 ma, t a = 25 c -62 72 v in = 4.3 v, i l = 100 ma, t a = 25 c - 62 72 v in = 5.0 v, i l = 100 ma, t a = 25 c -62 72 on-resistance temp.-coefficient tc rds - 3900 - ppm/c cntrl input low voltage c v il v in = 1.2 v -0.50.3 v v in = 1.8 v - 0.72 0.4 d v in = 2.5 v - 0.87 0.5 d v in = 3.6 v -1.00.6 d v in = 4.3 v - 1.08 0.7 d v in = 5.0 v - 1.15 0.8 d cntrl input high voltage c v ih v in = 1.2 v 0.9 d 0.54 - v in = 1.8 v 1.2 d 0.78 - v in = 2.5 v 1.4 d 0.96 - v in = 3.6 v 1.6 d 1.2 - v in = 4.3 v 1.7 d 1.32 - v in = 5.0 v 1.8 1.45 - en input leakage i sink v en = 5.5 v - - 1 a output pulldown resistance r pd cntrl = inactive, t a = 25 c (sip32414 only) - 217 280 output turn-on delay time t d(on) v in = 3.6 v, r load = 10 , t a = 25 c - 140 210 s output turn-on rise time t (on) 80 150 220 output turn-off delay time t d(off) -0.271
www.vishay.com 4 document number: 71437 s11-0366-rev. a, 07-mar-11 vishay siliconix SIP32413, sip32414 pin configuration typical characteristics internally regulated, 25 c, unless otherwise noted figure 2 - tdfn8 2 mm x 2 mm package 8 7 6 5 1 2 3 4 out1 g n d g n d out2 i n 1 c n trl1 c n trl2 i n 2 bottom v ie w pin description pin number name function 1 in1 this pin is the side 1 n-channel mosfet drain c onnection. bypass to ground through a 2.2 f capacitor 2 cntrl1 side 1 control input 3 cntrl2 side 2 control input 4 in2 this pin is the side 2 n-channel mosfet drain c onnection. bypass to ground through a 2.2 f capacitor 5 out2 this pin is the side 2 n-channel mosfet source connection. bypass to ground throught a 0.1 f capacitor 6 gnd ground connection 7 gnd ground connection 8 out1 this pin is the side 1 n-channel mosfet source connection. bypass to ground throught a 0.1 f capacitor truth table SIP32413 cntrl1 cntrl2 sw1 sw2 00onoff 0 1 on on 10offoff 11offon truth table sip32414 cntrl1 cntrl2 sw1 sw2 00offoff 01offon 10onoff 1 1 on on figure 3 - quiescent current vs. input voltage v in (v) i q - quiescent current (a) 0 20 40 60 80 100 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 figure 4 - quiescent current vs. temperature temperature (c) i q - quiescent current (a) - 40 - 20 0 20 40 60 80 100 0 10 20 30 40 50 60 70 80 90 v in = 5 v v in = 3.6 v v in = 1.2 v
document number: 71437 s11-0366-rev. a, 07-mar-11 www.vishay.com 5 vishay siliconix SIP32413, sip32414 typical characteristics internally regulated, 25 c, unless otherwise noted figure 5 - SIP32413 off supply current vs. v in figure 7 - sip32414 off supply current vs. v in figure 9 - off swith current vs. input voltage v in (v) i q(off) - off supply current (na) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 SIP32413 v in (v) i q(off) - off supply current (na) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 sip32414 v in (v) i ds(off) - off switch current (na) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 figure 6 - sip32414 off supply current vs. temperature figure 8 - sip32414 off supply current vs. temperature figure 10 - off swith current vs. temperature temperature (c) i q(off) - off switch current (na) - 40 - 20 0 20 40 60 80 100 0.001 0.01 0.1 1 10 100 SIP32413 v in = 5 v v in = 3.6 v v in = 1.2 v temperature (c) i q(off) - off supply current (na) - 40 - 20 0 20 40 60 80 100 0.001 0.01 0.1 1 10 100 1000 sip32414 v in = 1.2 v v in = 3.6 v v in = 5 v temperature (c) i ds(on) - off switch current (na) - 40 - 20 0 20 40 60 80 100 0.001 0.01 0.1 1 10 100 1000 v in = 1.2 v v in = 3.6 v v in = 5 v
www.vishay.com 6 document number: 71437 s11-0366-rev. a, 07-mar-11 vishay siliconix SIP32413, sip32414 typical characteristics internally regulated, 25 c, unless otherwise noted figure 11 - r ds(on) vs. input voltage figure 13 - sip32414 output pull down vs. input voltage figure 15 - reverse blocking current vs. output voltage v in (v) r ds - on-resistance (m ) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 60 62 64 66 68 70 72 i o = 2 a i o = 1.5 a i o = 1 a i o = 0.5 a i o = 0.1 a v in (v) r pd - output pulldown resistance ( ) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 100 150 200 250 300 350 400 450 500 550 sip32414 only v in = v out v out (v) i in - input current (na) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.01 0.1 1 10 100 1000 v in = 1.2 v v cntrl = inactive figure 12 - r ds(on) vs. temperature figure 14 - sip32414 output pull down vs. temperature figure 16 - reverse blocking current vs. temperature temperature (c) r ds - on-resistance (m ) - 40 - 20 0 20 40 60 80 100 40 45 50 55 60 65 70 75 i o = 0.1 a v in = 5 v temperature (c) r pd - output pulldown resistance ( ) - 40 - 20 0 20 40 60 80 100 205 210 215 220 225 230 235 sip32414 only v out = v in = 5 v temperature (c) i in - input current (na) - 40 - 20 0 20 40 60 80 100 10 100 1000 v in = 1.2 v v out = 5 v v cntrl = inactive
SIP32413, sip32414 vishay siliconix document number: 71437 s11-0366-rev. a, 07-mar-11 www.vishay.com 7 typical characteristics internally regulated, 25 c, unless otherwise noted typical waveforms figure 17 - cntrl threshold voltage vs. input voltage figure 19 - rise time vs. temperature v in (v) cntrl - threshold voltage (v) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 v ih v il 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 temperature (c) t (on) - turn-on rise time (s) - 40 - 20 0 20 40 60 80 100 130 140 150 160 170 180 190 200 210 220 v in = 5 v c l = 0.1 f r l = 10 temperature (c) t d(on) - turn-on delay time (s) - 40 - 20 0 20 40 60 80 100 60 70 80 90 100 110 120 130 140 150 160 v in = 5 v c l = 0.1 f r l = 10 temperature (c) t d(off) - turn-off delay time (s) - 40 - 20 0 20 40 60 80 100 0.10 0.12 0.14 0.16 0.18 0.20 0.22 v in = 5 v c l = 0.1 f r l = 10 figure 21 - SIP32413 channel 1 switching (v in = 3.6 v, r l = 7.2 ) v cntrl (2 v/div.) v out (1 v/div.) i out (200 ma/div.) time (100 s/div.) r l = 7.2 c l = 0.1 f figure 22 - SIP32413 channel 1 turn-off (v in = 3.6 v, r l = 7.2 ) v cntrl (2 v/div.) v out (1 v/div.) i out (200 ma/div.) time (1 s/div.) r l = 7.2 c l = 0.1 f
www.vishay.com 8 document number: 71437 s11-0366-rev. a, 07-mar-11 vishay siliconix SIP32413, sip32414 figure 23 - SIP32413 channel 1 switching (v in = 5 v, r l = 10 ) figure 25 - SIP32413 channel 2 and sip32414 switching (v in = 3.6 v, r l = 7.2 ) figure 27 - SIP32413 channel 2 and sip32414 switching (v in = 5 v, r l = 10 ) v cntrl (2 v/div.) i out (200 ma/div.) time (100 s/div.) r l = 10 c l = 0.1 f v out (2 v/div.) v cntrl (2 v/div.) v out (1 v/div.) i out (200 ma/div.) time (100 s/div.) r l = 7.2 c l = 0.1 f v cntrl (2 v/div.) i out (200 ma/div.) time (100 s/div.) r l = 10 c l = 0.1 f v out (2 v/div.) figure 24 - SIP32413 channel 1 turn-off (v in = 5 v, r l = 10 ) figure 26 - SIP32413 channel 2 and sip32414 turn-off (v in = 3.6 v, r l = 7.2 ) figure 28 - SIP32413 channel 2 and sip32414 turn-off (v in = 5 v, r l = 10 ) v cntrl (2 v/div.) i out (200 ma/div.) time (1 s/div.) r l = 10 c l = 0.1 f v out (2 v/div.) v cntrl (2 v/div.) i out (200 ma/div.) time (1 s/div.) r l = 7.2 c l = 0.1 f v out (1 v/div.) v cntrl (2 v/div.) i out (200 ma/div.) time (1 s/div.) r l = 10 c l = 0.1 f v out (2 v/div.)
SIP32413, sip32414 vishay siliconix document number: 71437 s11-0366-rev. a, 07-mar-11 www.vishay.com 9 block diagram pcb layout figure 29 - functional block diagram + - - + in1 cntrl1 cntrl2 in2 out1 gnd out2 sip32414 only reverse blocking reverse blocking charge pump charge pump logic control logic control turn on slew rate control turn on slew rate control top bottom figure 26 - pcb layout for tdfn8 2 mm x 2 mm (board size: 1.2 inch x 1.3 inch)
www.vishay.com 10 document number: 71437 s11-0366-rev. a, 07-mar-11 vishay siliconix SIP32413, sip32414 detailed description SIP32413 and sip32414 are dual n-channel power mosfets designed as high side load switch with slew rate control to prevent in-rush current. once enable the device charge pumps the gate of the power mosfet to 5 v gate to source voltage while controlling the slew rate of the turn on time. the mostly constant gate to source voltage keeps the on resistance low through out the input voltage range. for sip32414, when disable the output discharge circuit turns on to help pull the output voltage to ground more quickly. for both parts, in disable mode, the reverse blocking circuit is activated to prevent current from going back to the input in case the output voltage is high er than the input voltage. input voltage is needed for the reverse blocking circuit to work properly, it can be as low as v in(min) . application information input capacitor while bypass capacitors on the inputs are not required, 2.2 f or larger capacitors for c in is recommended in almost all applications. the bypass capacitors should be placed as physically close as possible to the device?s input to be effective in minimizing transients on the input. ceramic capacitors are recommended over tantalum because of their ability to withstand input curre nt surges from low impedance sources such as batter ies in portable devices. output capacitor a 0.1 f capacitor or larger across v out and gnd is recommended to insure proper slew operation. c out may be increased without limit to a ccommodate any load transient condition with only minimal affect on the turn on slew rate time. there are no esr or capacitor type requirement. control the cntrl pins are compatible with both ttl and cmos logic voltage levels. protection against reve rse voltage condition both SIP32413 and sip32414 contain reverse blocking circuitries to protect the current from going to the input from the output in case where the out put voltage is higher than the input voltage when the main swit ch is off. supply voltages as low as the minimum required input voltage are necessary for these circuitries to work properly. thermal considerations SIP32413 and sip32414 are designed to maintain constant output load current. due to ph ysical limitations of the layout and assembly of the device the maximum switch current is 2.4 a, as stated in the absolute maximum ratings table. however, another limiting c haracteristic for the safe operating load current is the thermal power dissipation of the package. to obtain the highest power dissipation (and a thermal resistance of 84) the power pad of the device should be connected to a heat sink on the printed circuit board. the maximum power dissipation in any application is dependant on the maximum junction temperature, t j(max.) = 125 c, the junction-to-ambient thermal resistance for the tdfn4 1.2 mm x 1.6 mm package, j-a = 84 c/w, and the ambient temperature, t a , which may be formulaically expressed as: it then follows that, assuming an ambient temperature of 70 c, the maximum power dissipation will be limited to about 655 mw. so long as the load current is below the 2.0 a limit, the maximum continuous switch current beco mes a function two things: the package power dissipation and the r ds(on) at the ambient temperature. as an example let us calculate the worst case maximum load current at t a = 70 c. the worst case r ds(on) at 25 c occurs at an input voltage of 1.2 v and is equal to 75 m . the r ds(on ) at 70 c can be extrapolated from this data using the following formula: r ds(on) (at 70 c) = r ds(on) (at 25 c) x (1 + t c x t) where t c is 3400 ppm/c. continuing with the calculation we have r ds(on) (at 70 c) = 75 m x (1 + 0.0034 x (70 c - 25 c)) = 86.5 m the maximum current limit is then determined by which in case is 2.75 a, assuming one switch turn on at a time. under the stated input volt age condition, if the 2.75 a current limit is exceeded the internal die temperature will rise and eventually, possibly damage the device. vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71437 . 8 4 125 (max.) (max.) a a j a j t t t p - = - = - ) ( (max.) (max.) o n ds load r p i <
document number: 67493 www.vishay.com revison: 07-feb-11 1 package information vishay siliconix case outline for tdfn8 2 x 2 note 1. all dimensions are in millimeters which will govern. 2. max. package wa rpage is 0.05 mm. 3. max. allowable burrs is 0. 076 mm in all directions. 4. pin #1 id on top will be laser/ink marked. 5. dimension applies to meatlized termin al and is measured between 0.20 mm and 0. 25 mm from terminal tip. 6. applied only for terminals. 7. applied for expose d pad and terminals. top vie w side vie w bottom vie w k k l d2 pin 1 indicator (optional) 8 7 6 5 1 2 3 4 b 5 e e2 1 2 3 4 8 7 6 5 d e a a3 a1 7 6 0.05 c index area (d/2 x e/2) millimeters inches dim. min. nom. max. min. nom. max. a 0.50 0.55 0.60 0.020 0.022 0.024 a1 0.00 - 0.05 0.000 - 0.002 a3 0.152 ref 0.006 ref b 0.18 0.23 0.28 0.007 0.009 0.011 d 1.95 2.00 2.05 0.077 0.079 0.081 d2 0.75 0.80 0.85 0.030 0.031 0.033 e 0.50 bsc 0.020 bsc e 1.95 2.00 2.05 0.077 0.079 0.081 e2 1.40 1.45 1.50 0.055 0.057 0.059 k - 0.20 - - 0.008 - l 0.30 0.35 0.40 0.012 0.014 0.016 ecn: c11-0033 rev. a, 07-feb-11 dwg: 5997
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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